| Project flow for ASIC and FPGA Designs |
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Firstly, our application engineers will find out what your specific needs are. Thereafter they will develop an understanding of the design challenges. At this initial step the customers' verbal description and outline of the design will suffice.
In phase 2 the specification of the projected design will outline the sope of performance concerning the application need, the design times and the schedule. After the customers' approval the design start-up procedure as well as the implementation plan will be initiated. Modifications will be transparently discussed with the customer, captured and only implemented with the approval of the customer. Finally the results are documented and the application certified.
Smartlogic provides the easiest path for designs that meet your requirements.
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