Knowledge
In order to support you in all phases of your project, we provide you subsequently with our knowledge in the form of application notes and white papers for download. Simple, convenient and without registration.
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Arria 10 Demo Design and Bitstream
This application note explains the features of the Arria 10 demo design for the DreamChip evaluation board
Basic Design principles with the Smartlogic PCIe DMA IP Cores
This application note describes the basic principles for continuous DMA data transfer
AXI2Avalon Protocol Conversion
This application note describes how to easily convert AXI interfaces to Avalon interfaces
Completion Sorting
This whitepaper describes the protocol rules regarding completions returning on read requests and what needs to be considered
Realizing Ethernet Links
This application note shows how to build Ethernet links using our High Channel Count DMA IP core and gives valuable information on configuring the PHY
Guidelines for Timing Closure
This application note describes what to look for to get into timing for Gen3-X8 links in the FPGA
Intel IP Catalog Flow
This application note describes how to properly configure the PCIe HardIPs of the Intel FPGAs to match the multi-channel DMA IP Cores
User Mode Software Library
In this application note you will learn which functions are included in the User Mode Library and how to communicate with the DMA IP cores from a high level