Multi-Channel AXI DMA Engine
The Multi-Channel AXI DMA Engine IP Core connects the AXI Stream and the AXI memory mapped world via a powerful DMA engine. Data from up to 16 AXI Stream slave inputs can be written to and read from AXI memory mapped (e.g. DDR memory) in parallel. AXI Stream Masters allow data to be actively read and then processed in multiple streams by subsequent DSP units. Flexible programmable address generators allow data to be written not only in linear ascending order, but also in descending order or in sections, so-called Regions of Interests (ROI). This makes it possible to sort the sequence of the data already with the IP core in order to make further processing considerably easier for subsequent algorithmic units.