FAQs
Here we answer many typical questions, regarding our products and licensing.
What is the licensing procedure ? Is there a license agreement ?
The basis for licensing is a license agreement based on the SignOnce IP Licensing agreement, which regulates the exact use of the IP core. SignOnce means a standard license agreement used by many IP manufacturers like e.g. AMD, which simplifies the review process.
Is it possible to get a sample of the license agreement ?
Yes, it is possible to get a sample of the license agreement as a PDF file for preview.
What about the license fee ? Is there a license fee for each product sold ?
The license fee is charged once when the IP core is purchased. Additional payments (royalties) are not charged.
In which form can the IP be licensed ?
The IP can be licensed either as encrypted or as source code. Encrypted licenses can also be limited to certain device families in order to be able to offer more favorable product variants by limiting the range of functions. The synthesis quality is the same for both forms (source or encrypted).
How often can I use the IP license ?
The full versions you have purchased can be used for an unlimited number of projects. This is also called a multi-project license.
What about support and maintenance ?
Each new license automatically includes the first 6 months of support and maintenance. After that you can freely decide if you want to extend the support and maintenance period by one year each. This is our recommendation. However, once you have opted out of support/maintenance, you can only re-enter by being charged for the time without support/maintenance with an additional expense fee. Customers on valid maintenance will automatically receive updates of new versions of the core.
Support is given by email. You describe your problem and we answer your questions.
What are typical applications of the IP cores?
Typical applications include video applications, high-speed data acquisition, and co-processor applications. However, the IP core family is fundamentally designed to be generic and is not limited to specific applications.
Why are there different HCC and ABD PCIe cores?
These two cores differ in their external interfaces. Some applications only require AXI Stream interfaces, while other applications also need memory-mapped AXI. With the two cores, the user can choose which mix of external interfaces is best suited for their project.
Is Gen5 link speed supported?
Yes, Gen5 link speed is supported, but it requires an FPGA family that also supports Gen5. The maximum link width with Gen5 is 4 lanes. Using bifurcation, 2x Gen5x4 is also supported, achieving the same throughput as Gen5-x8.
Which operating systems are supported?
Currently, we offer kernel-mode drivers for both Linux and Windows. Development is ongoing to support newer kernel versions and to avoid forcing the user to a specific OS version.
How long does it take to take the first steps with the IP cores?
For each IP core, there are reference designs that enable an easy start. In a first step, these can be ported very easily to the target hardware and tested with a C example application. From this solid baseline, the developer can then take small steps to modify and experiment with the reference design. This makes it possible to set something up within a few days and get a good introduction.
Are reference designs (HDL and C) delivered with the IP core?
Yes, reference designs in both HDL and C are delivered with each IP core. This makes it very easy to take the first steps.
Is PCIe bifurcation supported?
Yes, PCIe bifurcation is supported. This makes it possible to establish more than one link in a single slot. For example, using bifurcation, two PCIe Gen5-x4 links can be opened, which corresponds to a Gen5-x8 link. It is important to know that some FPGA families impose certain requirements for bifurcation. It is recommended to talk with us during the layout phase about what needs to be considered for a successful bifurcation application.